Computer Organization and Architecture: Designing for Performance
Computer Organization and Architecture: Designing for Performance
Microprocessor Architectures and Systems
Microprocessor Architectures and Systems
Computer Organization
Hardware concurrent garbage collection for short-lived objects in mobile java devices
EUC'05 Proceedings of the 2005 international conference on Embedded and Ubiquitous Computing
A hardware/software co-design and co-verification on a novel embedded object-oriented processor
EUC'05 Proceedings of the 2005 international conference on Embedded and Ubiquitous Computing
A novel JAVA processor for embedded devices
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
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In Object-Oriented Programming (OOP), programmers divide the software applications into small objects, each of which is responsible for performing part of the work. The communications between different objects are through method invocation. Method manipulation is taking a big role in an OOP system. The performance of method invocation would greatly affect the performance of an OOP system. To speed up method communication, an object-oriented computer architecture is proposed at hardware level. High Level Instruction Set Computer (HISC) is one of the OOP architectures proposed. It applies hardware readable data structures to provide mapping of OOP features directly from architectural level. One of the architectural designs that use the concept of HISC is jHISC v3, which is currently under development. It targets to support Java at architecture level.In this paper, we will discuss the method manipulation procedures in jHISC v3 system. By defining the hardware readable data structures for method context, we will see how jHISC v3 processor can use such information to provide a secure method manipulation mechanism for OOP.