High Performance Array Processor for Video Decoding
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Limitations of special-purpose instructions for similarity measurements in media SIMD extensions
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
Versatility of extended subwords and the matrix register file
ACM Transactions on Architecture and Code Optimization (TACO)
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In this paper, a novel architecture for transformdomain motion estimation is proposed. We derive arecursion equation from the algorithm and wavefrontarray processors are used to perform motion estimationalgorithm adaptively in the transform domain accordingto the compression ratio. It is also shown that a higherthroughput rate with the reduction of arithmetic buildingblocks, frame memory size and the number of memoryaccesses is achieved. The proposed architecture canalso reconfigure to different algorithms that can be usedto perform power-aware video encoding. Simulationresults on video sequences of different characteristicsshow comparable performance of the proposedalgorithm to spatial domain approaches in the aspectsof PSNR and compression ratio.