On Using Test Vector Differences for Reducing Test Pin Numbers

Authors:
Marie-Lise Flottes;Regis Poirier;Bruno Rouzeyre
Affiliations:
-;-;-
Venue:
DELTA '04 Proceedings of the Second IEEE International Workshop on Electronic Design, Test and Applications
Year:
2004

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An Arithmetic Structure for Test Data Horizontal Compression

Proceedings of the conference on Design, automation and test in Europe - Volume 1

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Abstract

We propose a method for reducing test data volume onSystem on Chip (SoC) architecture. This method reducesthe required number of Automatic Test Equipment (ATE)output pins compared to the number of scan-in inputs onevery core (horizontal compression). Compression anddecompression are based on arithmetic operations andoperators.