An end-to-end prototyping framework for compliant wireless LAN transceivers with smart antennas
Computer Communications
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In this paper, we present a timing andfrequency synchronization scheme and its FPGAimplementation for IEEE 802.11a WLAN systems.In the scheme, an efficient double auto-correlationmethod based on short training symbols is used fortiming synchronization. The performance of theproposed method is comparable or even superior tothat of the conventional timing synchronizationmethod under multipath fading channels. Byaveraging the correlation over four short trainingsymbols, the accuracy of frequency synchronizationusing short training symbols can be improved to alevel that the fine frequency synchronizationprocess using long training symbols in theconventional scheme would not be needed. Thusboth timing and frequency synchronization can beachieved using short training symbols alone toreduce computational complexity and overhead.Furthermore, the hardware architecture of theproposed synchronization scheme is developed. Thesynchronizer is mainly made up of correlator, anglecalculator and peak detector, which areimplemented by an iterative process, a CORDICcircuit and a finite state machine, respectively.Such an architecture results in low implementationcomplexity and low computational latency.