Quantification of memory communication

  • Authors:
  • Surendra Byna;Kirk W. Cameron;Xian-He Sun

  • Affiliations:
  • Department of Compuer Science, Illinois Institute of Technology, Chicago, IL;Department of Compuer Science, Illinois Institute of Technology, Chicago, IL and Department of Computer Science and Engineering, University of South Carolina, Columbia, SC;Department of Compuer Science, Illinois Institute of Technology, Chicago, IL

  • Venue:
  • High performance scientific and engineering computing
  • Year:
  • 2004

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Abstract

Communication in parallel applications is a combination of data transfers internally at a source or destination and across the network. Previous research focused on quantifying network transfer costs has indirectly resulted in reduced overall communication cost. Optimized data transfer from source memory to the network interface has received less attention. In shared memory systems, such memory-to-memory transfers dominate communication cost. In distributed memory systems, memory-to-network interface transfers grow in significance as processor and network speeds increase at faster rates than memory latency speeds. Our objective is to minimize the cost of internal data transfers. The following examples illustrating the impact of memory transfers on communication, we present a methodology for classifying the effects of data size and data distribution on hardware, middleware, and application software performance. This cost is quantified using hardware counter event measurements on the SGI Origin 2000. Our analysis technique identifies the critical data paths in point-to-point communication. For the SGI O2K, we empirically identify the cost caused by just copying data from one buffer to another and the middleware overhead. We use MPICH in our experiments, but our techniques are generally applicable to any communication implementation.