On routing in VLSI design and communication networks
Discrete Applied Mathematics
Approximating the Generalized Capacitated Tree-Routing Problem
COCOON '08 Proceedings of the 14th annual international conference on Computing and Combinatorics
On routing in VLSI design and communication networks
ISAAC'05 Proceedings of the 16th international conference on Algorithms and Computation
| Hi-index | 0.00 |
Modern integrated circuits can contain millions of elements making their design an overwhelming task. The design procedure is therefore divided into a sequence of design steps. Circuit layout is the design step in which a physical realization of a circuit is obtained from its functional description. Global routing is one of the key subproblems of the circuit layout which involves finding an approximate path for the wires connecting the elements of the circuit while minimizing the total interconnecting wire length. The global routing problem is NP-hard, therefore, heuristics capable of producing high quality routes with little computational effort are required as Integrated Circuits (IC) increase in size. In this thesis, a global routing technique that combines wire length, congestion estimation in the path of the wires and the number of vias in the trees is proposed and investigated. In the first stage of the global routing a good set of routes is constructed for each net. This set is produced based on minimizing the wire length and an approximate estimation of congestion. The global routing problem is then formulated as an Integer Linear Programming (ILP) problem with the objective of minimizing the wire length. Congestion estimation and number of vias are incorporated as penalty functions in the objective function. Two models are developed for the global routing problem. The first model focuses only on minimizing wire length while the second model considers both minimization of wire length and maximization of channel capacity. To solve the ILP model, first a linear relaxation of the model is solved using Interior Point algorithms. Computational efficiency is achieved by applying an eigenvalue based matrix re-ordering technique to the constraint matrix of the global routing formulation. The re-ordering of the constraint matrix of the optimization problem, increases the speed of the Interior Point algorithm. Subsequently, a rounding algorithm is developed to turn the fractional solutions of the Linear Programming (LP) problem to integer solutions. Global routing results produced by our heuristic are shown to reduce the congestion and wire length of the representative large-scale test circuits.