A fast on-chip profiler memory using a pipelined binary tree

Authors:
Roman Lysecky;Susan Cotterell;Frank Vahid
Affiliations:
Department of Computer Science and Engineering, University of California, Riverside, CA;Department of Computer Science and Engineering, University of California, Riverside, CA;Department of Computer Science and Engineering, University of California, Riverside, CA and Center for Embedded Computer Systems, University of California, Irvine, CA
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2004

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Abstract

We introduce a novel memory architecture that can count the occurrences of patterns on a system's bus, a task known as profiling. Such profiling can serve a variety of purposes, like detecting a microprocessor's software hot spots or frequently used data values, which can be used to optimize various aspects of the system. The memory, which we call ProMem, is based on a pipelined binary search tree structure, yielding several beneficial features, including nonintrusiveness, accurate counts, excellent size and power efficiency, very fast access times, and the use of standard memories with only simple additional logic. The main limitation is that the set of potential patterns must be preloaded into the memory. We describe the ProMem architecture, and show excellent size and performance advantages compared with content-addressable memory (CAM) based designs.