VLSI architectures for string matching and pattern matching
Pattern Recognition
CASM: A VLSI Chip for Approximate String Matching
IEEE Transactions on Pattern Analysis and Machine Intelligence
Clique-to-Clique Distance Computation Using a Specific Architecture
SSPR '98/SPR '98 Proceedings of the Joint IAPR International Workshops on Advances in Pattern Recognition
Function-Described Graphs Applied to 3D Object Representation
ICIAP '97 Proceedings of the 9th International Conference on Image Analysis and Processing-Volume I - Volume I
Texprint: A New Algorithm to Discriminate Textures Structurally
Proceedings of the Joint IAPR International Workshop on Structural, Syntactic, and Statistical Pattern Recognition
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Huge and expensive computation resources are usually required to perform graph labelling at high speed. This fact restricts an extensive use of this methodology in industrial applications such as visual inspection. A new systolic architecture is presented which computes structural distances between cliques of different graphs based on a modified incremental Levenshtein distance algorithm. The distances obtained are used as a support function for graph labelling using probabilistic relaxation techniques. The proposed architecture computes the distances between k input cliques of an input graph and one reference clique of a reference graph. It does not limit the number of cliques nor cliques complexity of the input graph, so any input graph can be labelled. A low cost solution has been implemented based on FPGAs.