Field-testing IMPACT EPIC research results in Itanium 2

  • Authors:

  • John W. Sias;Sain-zee Ueng;Geoff A. Kent;Ian M. Steiner;Erik M. Nystrom;Wen-mei W. Hwu

  • Affiliations:

  • University of Illinois at Urbana-Champaign;University of Illinois at Urbana-Champaign;University of Illinois at Urbana-Champaign;University of Illinois at Urbana-Champaign;University of Illinois at Urbana-Champaign;University of Illinois at Urbana-Champaign

  • Venue:
  • Proceedings of the 31st annual international symposium on Computer architecture
  • Year:
  • 2004

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Abstract

Explicitly-Parallel Instruction Computing (EPIC) providesarchitectural features, including predication and explicitcontrol speculation, intended to enhance the compiler'sability to expose instruction-level parallelism (ILP) incontrol-intensive programs. Aggressive structural transformationsusing these features, though described in theliterature, have not yet been fully characterized in completesystems. Using the Intel Itanium 2 microprocessor,the SPECint2000 benchmarks and the IMPACT Compilerfor IA-64, a research compiler competitive with thebest commercial compilers on the platform, we providean in situ evaluation of code generated using aggressive,EPIC-enabled techniques in a reality-constrained microarchitecture.Our work shows a 1.13 average speedup(up to 1.50) due to these compilation techniques, relativeto traditionally-optimized code at the same inlining andpointer analysis levels, and a 1.55 speedup (up to 2.30) relativeto GNU GCC, a solid traditional compiler. Detailedresults show that the structural compilation approach providesbenefits far beyond a decrease in branch mispredictionpenalties and that it both positively and negatively impactsinstruction cache performance. We also demonstratethe increasing significance of runtime effects, such as datacache and TLB, in determining end performance and theinteraction of these effects with control speculation.