Statistical Timing Analysis Considering Spatial Correlations using a Single Pert-Like Traversal

  • Authors:
  • Hongliang Chang;Sachin S. Sapatnekar

  • Affiliations:
  • University of Minnesota;University of Minnesota

  • Venue:
  • Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
  • Year:
  • 2003

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Abstract

We present an efficient statistical timing analysis algorithm thatpredicts the probability distribution of the circuit delay while incorporatingthe effects of spatial correlations of intra-die parametervariations, using a method based on principal component analysis.The method uses a PERT-like circuit graph traversal, and hasa run-time that is linear in the number of gates and interconnects,as well as the number of grid partitions used to model spatial correlations.On average, the mean and standard deviation valuescomputed by our method have errors of 0.2% and 0.9%, respectively,in comparison with a Monte Carlo simulation.