Design and power optimization of CMOS RF blocks operating in the moderate inversion region
SBCCI '05 Proceedings of the 18th annual symposium on Integrated circuits and system design
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This paper presents a design methodology for RF CMOS Low Noise Amplifiers (LNA). This methodology uses a current-based MOSFET model, which allows a detailed analysis of an LNA for all MOSFET's inversion regions. Design equations, including the induced gate noise in MOS devices are also presented and a design example with simulation results is shown.