Snoopy cache test-and-test-and-set without execessive bus contention

Authors:
Andy Glew;Wen-Mei Hwu
Affiliations:
Center for Reliable and High-Performance Computing, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign;Center for Reliable and High-Performance Computing, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign
Venue:
ACM SIGARCH Computer Architecture News
Year:
1990

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Abstract

This paper analyzes the burst of bus traffic that occurs when a lock is released that is being waited for in a test-and-test-and-set spinloop. It is typically O (N) and can be O (N2), depending on assumptions about system behaviour, where N is the number of processors. Supporting a single feature in the bus interface, abandoning pending lock requests, reduces this to O (1). Such a feature is already possible on some systems and busses, but has not been applied to synchronization.