A BIST scheme for on-chip ADC and DAC testing
DATE '00 Proceedings of the conference on Design, automation and test in Europe
DSP-Based Testing of Analog and Mixed-Signal Circuits
DSP-Based Testing of Analog and Mixed-Signal Circuits
Analog Signal Generation for Built-in-Self-Test of Mixed-Signal Integrated Circuits
Analog Signal Generation for Built-in-Self-Test of Mixed-Signal Integrated Circuits
OFDM for Wireless Multimedia Communications
OFDM for Wireless Multimedia Communications
A STAND-ALONE INTEGRATED TEST CORE FOR TIME AND FREQUENCY DOMAIN MEASUREMENTS
ITC '00 Proceedings of the 2000 IEEE International Test Conference
A Signature Test Framework for Rapid Production Testing of RF Circuits
Proceedings of the conference on Design, automation and test in Europe
Low Cost Analog Testing of RF Signal Paths
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Feature Extraction Based Built-In Alternate Test of RF Components Using a Noise Reference
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
Improving mixed-signal SOC testing: a power-aware reuse-based approach with analog BIST
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
Low Cost On-Line Testing Strategy for RF Circuits
Journal of Electronic Testing: Theory and Applications
An improved RF loopback for test time reduction
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Low-cost testing of 5 GHz low noise amplifiers using new RF BIST circuit
Journal of Electronic Testing: Theory and Applications
A Novel RF Test Scheme Based on a DFT Method
Journal of Electronic Testing: Theory and Applications
CMOS blocks for on-chip RF test
Analog Integrated Circuits and Signal Processing
A DFT Approach for Testing Embedded Systems Using DC Sensors
IEEE Design & Test
Interactive presentation: Boosting SER test for RF transceivers by simple DSP technique
Proceedings of the conference on Design, automation and test in Europe
Reducing Test Time Using an Enhanced RF Loopback
Journal of Electronic Testing: Theory and Applications
A Module for BiST of CMOS RF Receivers
Journal of Electronic Testing: Theory and Applications
Predictive test strategy for CMOS RF mixers
Integration, the VLSI Journal
Go/No-Go testing of VCO modulation RF transceivers through the delayed-RF setup
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
An on-chip loopback block for RF transceiver built-in test
IEEE Transactions on Circuits and Systems II: Express Briefs
Detailed characterization of transceiver parameters through loop-back-based BiST
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Built-in loopback test for IC RF transceivers
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
RF on-chip test by reconfiguration technique
ICC'06 Proceedings of the 10th WSEAS international conference on Circuits
System-level specification testing of wireless transceivers
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An analytical technique for characterization of transceiver IQ imbalances in the loop-back mode
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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Built-In Self-Test (BIST) becomes important also for more complex structures like complete front-ends. In order to bring down the costs for the test overhead, Spectral Signature Analysis at system level seems to be a promising concept. Investigations that have been carried out are targeted on the most challenging problems: Generation of the Test Signature, Evaluation of the Signature Response, Implementation of the concept and Verification by Simulation. From investigations it can be concluded that the concept is suitable especially in the case of transceiver-type DUT.