Battery-aware static scheduling for distributed real-time embedded systems
Proceedings of the 38th annual Design Automation Conference
Power-aware scheduling under timing constraints for mission-critical embedded systems
Proceedings of the 38th annual Design Automation Conference
Communication architecture based power management for battery efficient system design
Proceedings of the 39th annual Design Automation Conference
Operation Binding and Scheduling for Low Power Using Constraint Logic Programming
EUROMICRO '98 Proceedings of the 24th Conference on EUROMICRO - Volume 1
Synthesis of low-power DSP systems using a genetic algorithm
IEEE Transactions on Evolutionary Computation
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We present a high-level synthesis algorithm solving the combined scheduling, allocation and binding problem minimizing area under both latency and maximum power per clock-cycle constraints. Our approach eliminates the large power spikes, resulting in an increased battery lifetime, a property of outmost importance for battery powered embedded systems. Our approach extends the partial-clique partitioning algorithm of [3] by introducing power awareness through a heuristic algorithm which bounds the design space to those of power feasible schedules. We have applied our algorithm on a set of data flow graphs and investigated the impact on circuit area when applying different power constraints.