Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
Code Optimization Across Procedures
Computer
Profile-guided automatic inline expansion for C programs
Software—Practice & Experience
Hardware and software for functional and fine grain parallelism
Hardware and software for functional and fine grain parallelism
Selective specialization for object-oriented languages
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
A general method for compiling event-driven simulations
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Interval scheduling: fine-grained code scheduling for embedded systems
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
A co-synthesis approach to embedded system design automation
Design Automation for Embedded Systems
Compile-Time Scheduling of Dynamic Constructs in Dataflow Program Graphs
IEEE Transactions on Computers
Compiling Esterel into sequential code
Proceedings of the 37th Annual Design Automation Conference
Function inlining under code size constraints for embedded processors
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
A comparative study of static and profile-based heuristics for inlining
DYNAMO '00 Proceedings of the ACM SIGPLAN workshop on Dynamic and adaptive compilation and optimization
Design of a separable transition-diagram compiler
Communications of the ACM
Efficient compilation of process-based concurrent programs without run-time scheduling
Proceedings of the conference on Design, automation and test in Europe
Compiling for Fine-Grain Concurrency: Planning and Performing Software Thread Integration
RTSS '02 Proceedings of the 23rd IEEE Real-Time Systems Symposium
Procedure Cloning and Integration for Converting Parallelism from Coarse to Fine Grain
INTERACT '03 Proceedings of the Seventh Workshop on Interaction between Compilers and Computer Architectures
Software thread integration for hardware to software migration
Software thread integration for hardware to software migration
Extending STI for demanding hard-real-time systems
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Asynchronous software thread integration for efficient software
Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Enhancing the AvrX Kernel with Efficient Secure Communication Using Software Thread Integration
RTAS '04 Proceedings of the 10th IEEE Real-Time and Embedded Technology and Applications Symposium
Balancing register pressure and context-switching delays in ASTI systems
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
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Asynchronous Software Thread Integration (ASTI) provides fine-grain concurrency in real-time threads by statically scheduling (integrating) code from primary threads into secondary threads, reducing the context switching needed and allowing recovery of fine-grain idle time. Unlike STI, ASTI allows asynchronous thread progress.Current ASTI techniques do not support procedure calls in the secondary thread because they lead to timing conflicts during static scheduling. ASTI requires knowing the secondary thread's instruction execution schedule to guide placement of real-time instructions from the primary thread. A secondary thread procedure called from multiple sites will have ambiguous timing at compile time.In this paper we remove this constraint using both procedure inlining and cloning. We present a formal approach to choosing a subset of calls to inline and to remove the timing conflicts in the remaining call sites in an efficient fashion. Excessive inlining and cloning both lead to code size explosion, while poor choices in timing conflict elimination slow program execution. The cloned threads show a significant speedup when compared to non-cloned versions yet have low code expansion. The techniques presented here have been implemented in our post-pass compiler Thrint and demonstrated on a benchmark suite of secondary threads representative of low-end embedded systems.