Of Piglets and Threadlets: Architectures for Self-Contained, Mobile, Memory Programming

Authors:
Peter M. Kogge
Affiliations:
Univ. of Notre Dame, IN
Venue:
IWIA '04 Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems
Year:
2004

Citing 0
Cited 2

Models for generating locality-tuned traveling threads for a hierarchical multi-level heterogeneous multicore

Proceedings of the 7th ACM international conference on Computing frontiers
Energy-efficient multithreading for a hierarchical heterogeneous multicore through locality-cognizant thread generation

Journal of Parallel and Distributed Computing

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Abstract

Virtually all of the discussion on "commodity" vs "custom" architectures, especially for highly parallel systems, has focused on the high-glamor, high complexity processor core. This paper takes a different tack - it explores the potential for directly attacking the memory wall by programming the classically "dumb" memory interface. Several related but separable techniques are involved: converting the data that makes up a memory request into the machine state of a "traveling thread," and developing an ISA that can manipulate this state via extremely short instructions that allow complete programs to be stored within the access packet. The results are interesting: a wide spectrum of functions applications exist for which this approach provides significant improvement in bandwidth and latency.