Selective compilation via fast code analysis and bytecode tracing
Proceedings of the 2006 ACM symposium on Applied computing
Development platform for parallel image processing
SSIP'06 Proceedings of the 6th WSEAS International Conference on Signal, Speech and Image Processing
Performing real-time image processing on distributed computer systems
MUSP'10 Proceedings of the 10th WSEAS international conference on Multimedia systems & signal processing
Parallel image and video processing on distributed computer systems
WSEAS Transactions on Signal Processing
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The application fields of bytecode virtual machines and VLIW processors overlap in the area of embedded and mobile systems, where the two technologies offer different benefits, namely high code portability, low power consumption and reduced hardware cost. Dynamic compilation makes it possible to bridge the gap between the two technologies, but special attention must be paid to software instruction scheduling, a must for the VLIW architectures. We have implemented JIST, a Virtual Machine and JIT compiler for Java Bytecode targeted to a VLIW processor. We show the impact of various optimizations on the performance of code compiled with JIST through the experimental study on a set of benchmark programs. We report significant speedups, and increments in the number of instructions issued per cycle up to 50% with respect to the non-scheduling version of the JIT compiler. Further optimizations are discussed.