Computer Networks
Distributed Micro Minicomputer Systems: Structure, Implementation and Application
Distributed Micro Minicomputer Systems: Structure, Implementation and Application
Logical Design of Multiple Microprocessor Systems
Logical Design of Multiple Microprocessor Systems
A comparison of methods for simulating computer bus architectures
WSC '81 Proceedings of the 13th conference on Winter simulation - Volume 1
| Hi-index | 0.00 |
This paper presents the results of the simulation of three different bus architectures used in multiprocessor systems. The TIMESHARED BUS, MULTIBUS, and, CROSS BAR SWITCH configurations were modeled. Activity diagrams were used as a basis to develop the models. Since our models were based upon hypothetical multiprocessor systems, there was no way to compare the models' performance with actual hardware performance. Therefore, independent models were developed in both FORTRAN and Pascal to validate the results. Each model contains a number of functional units, i.e. memory modules (MM), central processing units (CPU's), and input/output processors (IOP's), connected by a particular bus configuration. The results of the simulations are presented as a series of graphs that display average percentage utilization curves for a particular module class, such as CPU's, as a function of some independent variable such as I/O request rate. The results of some of the simulations are compared with similar results published by other authors.