A practical application of memory interference models

  • Authors:
  • Dileep P. Bhandarkar

  • Affiliations:
  • Texas Instruments Incorporated, Dallas, Texas

  • Venue:
  • ACM SIGMETRICS Performance Evaluation Review
  • Year:
  • 1975

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Abstract

This paper briefly describes an approximate Markov chain model for memory interference in a multiprocessor system like C.mmp. The modeling assumptions explain the level of abstraction at which the analysis is carried out. Some empirical measurements are presented to determine the model parameters for C.mmp. The analytic results obtained from the model are compared with some measured and simulation results.