An Active Learning Scheme Using Support Vector Machines for Analog Circuit Feasibility Classification

Authors:
Mengmeng Ding;Ranga Vemuri
Affiliations:
University of Cincinnati;University of Cincinnati
Venue:
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Year:
2005

Citing 0
Cited 3

A Two-Level Modeling Approach to Analog Circuit Performance Macromodeling

Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
A combined feasibility and performance macromodel for analog circuits

Proceedings of the 42nd annual Design Automation Conference
Data-based modeling of analog-mixed signal systems in automotive applications with support vector machines

ASM '07 The 16th IASTED International Conference on Applied Simulation and Modelling

Quantified Score

Hi-index	0.00

Visualization

Abstract

This paper presents a new active learning scheme using Support Vector Machines (SVMs) and its application in identifying the feasibility design space of analog circuit. The proposed methodology uses a committee of SVM classifiers to exclude a large portion of the entire design space and samples only the feasibility region and its neighboring. We also introduce three accuracy metrics due to the extreme sparsity of the feasibility design space in the entire design space. Experimental results show that the three accuracy metrics of the final constructed classifier are much better than those of a classifier constructed by a passive learning scheme which samples the entire design space uniform randomly.