ARCHGEN: automated synthesis of analog systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DAISY: a simulation-based high-level synthesis tool for ΔΣ modulators
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Behavioral modeling for high-level synthesis of analog and mixed-signal systems from VHDL-AMS
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Exploration-based high-level synthesis of linear analog systems operating at low/medium frequencies
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Top-down heterogeneous synthesis of analog and mixed-signal systems
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Reconfigurable ΔΣ modulator topology design through hierarchical mapping and constraint extraction
Integration, the VLSI Journal
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This paper proposes a novel architecture synthesis algorithm for single-loop single-bit 驴驴 modulators. We defined a generic modulator architecture and derived its noise and signal transfer function (NTF/STF) in symbolic forms. We then used the TF in MINLP to generate optimal topologies for a variety of design requirement, such as modulator complexity, sensitivity and power consumption, which appeard as cost functions. Experiments show the superiority of synthesized topologies as compared to traditional solutions.