The PowerPC architecture: a specification for a new family of RISC processors
The PowerPC architecture: a specification for a new family of RISC processors
The effectiveness of multiple hardware contexts
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
Complete Computer System Simulation: The SimOS Approach
IEEE Parallel & Distributed Technology: Systems & Technology
An overview of the BlueGene/L Supercomputer
Proceedings of the 2002 ACM/IEEE conference on Supercomputing
Design and validation of a performance and power simulator for PowerPC systems
IBM Journal of Research and Development
The BlueGene/L pseudo cycle-accurate simulator
ISPASS '04 Proceedings of the 2004 IEEE International Symposium on Performance Analysis of Systems and Software
Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors
Proceedings of the 32nd annual international symposium on Computer Architecture
Improving energy efficiency by making DRAM less randomly accessed
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
A performance-conserving approach for reducing peak power consumption in server systems
Proceedings of the 19th annual international conference on Supercomputing
An SPU reference model for simulation, random test generation and verification
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
K42: an infrastructure for operating system research
ACM SIGOPS Operating Systems Review
Application of full-system simulation in exploratory system design and development
IBM Journal of Research and Development
K42: building a complete operating system
Proceedings of the 1st ACM SIGOPS/EuroSys European Conference on Computer Systems 2006
The memory behavior of cache oblivious stencil computations
The Journal of Supercomputing
Multi-core design automation challenges
Proceedings of the 44th annual Design Automation Conference
Parallelization of IBM mambo system simulator in functional modes
ACM SIGOPS Operating Systems Review
Synchronized network emulation: matching prototypes with complex simulations
ACM SIGMETRICS Performance Evaluation Review
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
ARCS '09 Proceedings of the 22nd International Conference on Architecture of Computing Systems
ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Hybrid cache architecture with disparate memory technologies
Proceedings of the 36th annual international symposium on Computer architecture
Performance of large low-associativity caches
ACM SIGMETRICS Performance Evaluation Review
Enigma: architectural and operating system support for reducing the impact of address translation
Proceedings of the 24th ACM International Conference on Supercomputing
Wireless network cloud: architecture and system requirements
IBM Journal of Research and Development
ReSim, a trace-driven, reconfigurable ILP processor simulator
Proceedings of the Conference on Design, Automation and Test in Europe
Design exploration of hybrid caches with disparate memory technologies
ACM Transactions on Architecture and Code Optimization (TACO)
Euro-Par'10 Proceedings of the 16th international Euro-Par conference on Parallel processing: Part II
COREMU: a scalable and portable parallel full-system emulator
Proceedings of the 16th ACM symposium on Principles and practice of parallel programming
VM-based slack emulation of large-scale systems
Proceedings of the 1st International Workshop on Runtime and Operating Systems for Supercomputers
Mind the gap: reconnecting architecture and OS research
HotOS'13 Proceedings of the 13th USENIX conference on Hot topics in operating systems
Cache injection for parallel applications
Proceedings of the 20th international symposium on High performance distributed computing
SpamWatcher: a streaming social network analytic on the IBM wire-speed processor
Proceedings of the 5th ACM international conference on Distributed event-based system
Flow: A Stream Processing System Simulator
PADS '10 Proceedings of the 2010 IEEE Workshop on Principles of Advanced and Distributed Simulation
Efficient stack distance computation for priority replacement policies
Proceedings of the 8th ACM International Conference on Computing Frontiers
Performance modeling for systematic performance tuning
State of the Practice Reports
Software–hardware cooperative power management for main memory
PACS'04 Proceedings of the 4th international conference on Power-Aware Computer Systems
On the interfacing between QEMU and SystemC for virtual platform construction: Using DMA as a case
Journal of Systems Architecture: the EUROMICRO Journal
Virtual-machine-based emulation of future generation high-performance computing systems
International Journal of High Performance Computing Applications
MCEmu: A Framework for Software Development and Performance Analysis of Multicore Systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Modeling, validation, and co-design of IBM Blue Gene/Q: tools and examples
IBM Journal of Research and Development
Trace construction using enhanced performance monitoring
Proceedings of the ACM International Conference on Computing Frontiers
Improving virtualization in the presence of software managed translation lookaside buffers
Proceedings of the 40th Annual International Symposium on Computer Architecture
Using automated performance modeling to find scalability bugs in complex codes
SC '13 Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis
Fast full-system execution-driven performance simulator for blue gene/q
Euro-Par'13 Proceedings of the 19th international conference on Parallel Processing
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Mambo is a full-system simulator for modeling PowerPC-based systems. It provides building blocks for creating simulators that range from purely functional to timing-accurate. Functional versions support fast emulation of individual PowerPC instructions and the devices necessary for executing operating systems. Timing-accurate versions add the ability to account for device timing delays, and support the modeling of the PowerPC processor microarchitecture. We describe our experience in implementing the simulator and its uses within IBM to model future systems, support early software development, and design new system software.