PCI-X System Architecture with CD
PCI-X System Architecture with CD
EMP: zero-copy OS-bypass NIC-driven gigabit ethernet message passing
Proceedings of the 2001 ACM/IEEE conference on Supercomputing
Performance Evaluation of Copper-Based Gigabit Ethernet Interfaces
LCN '02 Proceedings of the 27th Annual IEEE Conference on Local Computer Networks
Optimizing 10-Gigabit Ethernet for Networks of Workstations, Clusters, and Grids: A Case Study
Proceedings of the 2003 ACM/IEEE conference on Supercomputing
Eliminating receive livelock in an interrupt-driven kernel
ATEC '96 Proceedings of the 1996 annual conference on USENIX Annual Technical Conference
Gigabit Ethernet PCI adapter performance
IEEE Network: The Magazine of Global Internetworking
The DataTAG transatlantic testbed
Future Generation Computer Systems - Special issue: High-speed networks and services for data-intensive grids: The DataTAG project
VLBI_UDP: An application for transporting VLBI data using the UDP protocol
Future Generation Computer Systems
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System administrators often assume that just by plugging in a Gigabit Ethernet Interface, the system will deliver line rate performance; sadly this is not often the case. The behaviour of various 1 and 10 Gigabit Ethernet Network Interface cards (NICs) has been investigated using server quality motherboards. The latency, throughput, and the activity on the PCI buses and Gigabit Ethernet links were chosen as performance indicators. The tests were performed using two PCs connected back-to-back and sending UDP/IP frames from one to the other. This paper shows the importance of having a good combination of memory and peripheral bus chipset, Ethernet Interface, CPU power, good driver, and operating system designs and proper configuration to achieve and sustain gigabit transfer rates. With these considerations taken into account, and suitably designed hardware, transfers can operate at gigabit and multi-gigabit speeds. Some recommendations are given for high performance data servers.