Improving energy efficiency by making DRAM less randomly accessed

  • Authors:
  • Hai Huang;Kang G. Shin;Charles Lefurgy;Tom Keller

  • Affiliations:
  • University of Michigan;University of Michigan;IBM Austin Research Lab;IBM Austin Research Lab

  • Venue:
  • ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
  • Year:
  • 2005

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Abstract

Existing techniques manage power for the main memory by passively monitoring the memory traffic, and based on which, predict when to power down and into which low-power state to transition. However, passively monitoring the memory traffic can be far from being effective as idle periods between consecutive memory accesses are often too short for existing power-management techniques to take full advantage of the deeper power-saving state implemented in modern DRAM architectures. In this paper, we propose a new technique that will actively reshape the memory traffic to coalesce short idle periods --- which were previously unusable for power management --- into longer ones, thus enabling existing techniques to effectively exploit idleness in the memory