Hardware Implementation of an Additive Bit-Serial Algorithm for the Discrete Logarithm Modulo 2^k
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
A digit serial algorithm for the integer power operation
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
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Recent research has demonstrated the vulnerability of certain smart card architectures to power and electro-magnetic analysis when multiplier operations areinsufficiently shielded from external monitoring. Here several standard multipliers are investigated ...