Towards a Framework for System-Level Design of Multiprocessor SoC Platforms for Media Processing

  • Authors:
  • Samarjit Chakraborty

  • Affiliations:
  • Department of Computer Science National University of Singapore

  • Venue:
  • ASAP '05 Proceedings of the 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors
  • Year:
  • 2005

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Abstract

Recently a number of "event-centric" models have been proposed for analyzing multimedia applications running on multiprocessor System-on-Chip (SoC) platforms. This has given shape to a general framework using which different timing and performance analysis questions can be answered in a single coherent manner. Central to this framework is a model for expressing the timing properties associated with different multimedia streams and a means for computing how these properties change as a stream gets successively processed by the different processors of a platform. In contrast to standard event models like periodic or sporadic, this model can accurately capture the datadependent execution time variabilities associated multimedia tasks and the burstiness of on-chip traffic resulting from multimedia processing. In this paper we give a high-level view of this framework, describe setups which currently can be modelled using it, and identify possible directions in which this framework should be extended to make it more usable.