Algorithmic and Architectural Design Methodology for Particle Filters in Hardware

  • Authors:
  • Aswin C. Sankaranarayanan;Rama Chellappa;Ankur Srivastava

  • Affiliations:
  • Electrical and Computer Engineering Department, University of Maryland at College Park;Electrical and Computer Engineering Department, University of Maryland at College Park;Electrical and Computer Engineering Department, University of Maryland at College Park

  • Venue:
  • ICCD '05 Proceedings of the 2005 International Conference on Computer Design
  • Year:
  • 2005

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Abstract

In this paper we present algorithmic and architectural methodology for building Particle Filters in hardware. Particle filtering is a new paradigm for filtering in presence of non-Gaussian non-linear state evolution and observation models. This technique has found wide-spread application in tracking, navigation, detection problems especially in a sensing environment. So far most particle filtering implementations are not lucrative for real time problems due to excessive computational complexity involved. In this paper, we re-derive the particle filtering theory to make it more amenable to simplified VLSI implementations. Furthermore, we present and analyze pipelined architectural methodology for designing these computational blocks. Finally, we present an application using the Bearing Only Tracking Problem and evaluate the proposed architecture and algorithmic methodology.