High performance, low power and secure embedded systems

  • Authors:
  • Zili Shao;Edwin Sha

  • Affiliations:
  • The University of Texas at Dallas;The University of Texas at Dallas

  • Venue:
  • High performance, low power and secure embedded systems
  • Year:
  • 2005

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Abstract

Embedded systems are driving an information revolution with their pervasion in our everyday lives. The increasingly ubiquitous embedded systems pose a host of technical challenges different from those faced by general-purpose computer systems because they are more application specific and more constrained in terms of timing, power, area, memory and other resources. It becomes an important research problem to design high-performance, low power and secure embedded systems with various constraints and limited resources. In our research, we have attacked this problem from various aspects including low power optimization, high-level architecture synthesis, and hardware/software co-design for embedded system security. In low power optimization, we focus on reducing power consumption on VLIW (Very Long Instruction Word) architectures. We identify that switching activity and schedule length are the two most important factors that influence the energy consumption of an application executed on a VLIW processor. We formally prove that the minimum-switching-activities scheduling problem is NP-complete with or without resource constraints. Several novel scheduling techniques have been proposed that tremendously improve the state-of-the-art techniques. In high-level architecture synthesis, we address high-level architecture synthesis for real-time Digital Signal Processing (DSP) using heterogeneous functional units (FUs). With more and more different types of FUs available, same type of operations can be processed by heterogeneous FUs with different costs, where the cost may relate to power, reliability, etc. For such special purpose architecture synthesis, therefore, an important problem is how to assign a proper function unit type to each operation of a DSP application and generate a schedule in such a way that all requirements can be met and the total cost can be minimized. We prove that this problem is NP-complete and propose several algorithms to solve it. The experiments show that our algorithms can effectively reduce the total cost compared with the previous work. Security is another important issue in embedded system designs. With more embedded systems networked, it becomes an important problem to defend them against buffer overflow attacks that have been causing serious security problems for decades. We propose a hardware/software co-design technique to solve this problem, and our technique can defend embedded systems against more types of attacks with less overhead compared with the previous work. We also propose a novel hardware/software optimization technique that can greatly reduce the overhead of array & pointer boundary checking, one of the most effective buffer overflow defending techniques when source code is available.