Design and Implementation of a Content-Aware Switch Using a Network Processor

Authors:
Li Zhao;Yan Luo;Laxmi Bhuyan;Ravi Iyer
Affiliations:
University of California at Riverside;University of California at Riverside;University of California at Riverside;Intel Corporation
Venue:
HOTI '05 Proceedings of the 13th Symposium on High Performance Interconnects
Year:
2005

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Abstract

Memory systems for conventional large-scale computers provide only limited bytes/s of data bandwidth when compared to their flop/s of instruction execution rate. The resulting bottleneck limits the bytes/flop that a processor may access from the full ...