On the Impact of Structural Circuit Partitioning on SAT-Based Combinational Circuit Verification

Authors:
Marc Herbstritt;Thomas Kmieciak;Bernd Becker
Affiliations:
Albert-Ludwigs-University;Albert-Ludwigs-University;Albert-Ludwigs-University
Venue:
MTV '04 Proceedings of the Fifth International Workshop on Microprocessor Test and Verification
Year:
2004

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Abstract

Real world software applications, in addition to carefully crafted test cases, are often used in microprocessor and system verification as they exercise the interaction of many different functional blocks in the processor. In the case of dynamic binary ...