From LOTOS to Petri nets through expansion
IFIP TC6/ 6.1 international conference on formal description techniques IX/protocol specification, testing and verification XVI on Formal description techniques IX : theory, application and tools: theory, application and tools
Communication and Concurrency
Mapping Petri Nets with Inhibitor Arcs onto Basic LOTOS Behavior Expressions
IEEE Transactions on Computers
Compilation and verification of LOTOS specifications
Proceedings of the IFIP WG6.1 Tenth International Symposium on Protocol Specification, Testing and Verification X
From timed Petri nets to timed LOTOS
Proceedings of the IFIP WG6.1 Tenth International Symposium on Protocol Specification, Testing and Verification X
A Reachability Analysis of RT-LOTOS Specifications
Proceedings of the IFIP TC6 Eighth International Conference on Formal Description Techniques VIII
An Efficient Algorithm for Minimizing Real-time Transition Systems
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Analysis of Timed Systems Based on Time-Abstracting Bisimulation
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
TURTLE: A Real-Time UML Profile Supported by a Formal Validation Toolkit
IEEE Transactions on Software Engineering
Experience with RT-LOTOS, a temporal extension of the LOTOS formal description technique
Computer Communications
Mapping RT-LOTOS specifications into time petri nets
ICFEM'06 Proceedings of the 8th international conference on Formal Methods and Software Engineering
Effective representation of RT-LOTOS terms by finite time petri nets
FORTE'06 Proceedings of the 26th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
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The formal description technique RT-LOTOS has been selected as intermediate language to add formality to a real-time UML profile named TURTLE. For this sake, an RT-LOTOS verification platform has been developed for early detection of design errors in real-time system models. The paper discusses an extension of the platform by inclusion of verification tools developed for Time Petri Nets. The starting point is the definition of RT-LOTOS to TPN translation patterns. In particular, we introduce the concept of components embedding Time Petri Nets. The translation patterns are implemented in a prototype tool which takes as input an RT-LOTOS specification and outputs a TPN in the format admitted by the TINA tool. The efficiency of the proposed solution has been demonstrated on various case studies.