A domain specific reconfigurable Viterbi fabric for system-on-chip applications

  • Authors:

  • Cheng Zhan;Tughrul Arslan;Sami Khawam;Iain Lindsay

  • Affiliations:

  • University of Edinburgh, King's Buildings, Edinburgh, UK;University of Edinburgh, King's Buildings, Edinburgh, UK;University of Edinburgh, King's Buildings, Edinburgh, UK;University of Edinburgh, King's Buildings, Edinburgh, UK

  • Venue:
  • Proceedings of the 2005 Asia and South Pacific Design Automation Conference
  • Year:
  • 2005

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Abstract

A novel embedded dynamically reconfigurable fabric for implementing the Viterbi algorithm in a System-on-Chip device is presented in this paper. The proposed reconfigurable fabric can support Viterbi implementations for different standards, such as GSM, IS-95, CDMA and Wireless LAN. Our results illustrate that the proposed architecture has superior power consumption and throughput characteristics and it is demonstrated a 80% reduction in power consumption over generic field programmable gate array (FPGA) and 40 times improvement in throughput over digital signal processor (DSP), respectively. Thus, the reconfigurable system-on-chip platform based on this kind of domain specific reconfigurable fabrics is an efficient solution for the high-performance portable communication systems.