An APL-simulator of non-Von Neumann computer architectures

  • Authors:
  • Andreas Geyer-Schulz;Johann Mitlöhner;Alfred Taudes

  • Affiliations:
  • Vienna University of Economics and Business Administration, Department of Applied Computer Science, Augasse 2-6, 1090 Vienna, Austria;Vienna University of Economics and Business Administration, Department of Applied Computer Science, Augasse 2-6, 1090 Vienna, Austria;Vienna University of Economics and Business Administration, Department of Applied Computer Science, Augasse 2-6, 1090 Vienna, Austria

  • Venue:
  • APL '90 Conference proceedings on APL 90: for the future
  • Year:
  • 1990

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Abstract

APL has a long tradition as a language for the notation of computer architectures that dates back to its use as notation of the IBM 360 system. Its powerful primitives and compactness make it an ideal tool for simulating hardware functions in order to gain insights into the functionality, the performance and the programming issues of an algorithm without the need to undergo the painstaking process of actually building the target machine and implementing the program on it. We have developed an APL2 software simulator for Non-Von Neumann computers. The basic data structure of the system is an array whose elements model a number of RAMs containing control registers, data and program code. The user can “define” his/her machine by specifying the communication network and communication primitives, the instruction set and its semantics, and the complexity measure. We demonstrate the use of the program system for studying various schemes for adaptive load sharing on multicomputers.