Introduction to Monte Carlo methods
Proceedings of the NATO Advanced Study Institute on Learning in graphical models
Proceedings of the 37th Annual Design Automation Conference
Parametric fault simulation and test vector generation
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 39th annual Design Automation Conference
Neural Networks for Pattern Recognition
Neural Networks for Pattern Recognition
7.4 Hierarchical Statistical Inference Model for Specification Based Testing of Analog Circuits
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
Boosting the Accuracy of Analog Test Coverage Computation through Statistical Tolerance Analysis
VTS '02 Proceedings of the 20th IEEE VLSI Test Symposium
Weighted importance sampling in shooting algorithms
SCCG '03 Proceedings of the 19th spring conference on Computer graphics
Proceedings of the 2004 international symposium on Low power electronics and design
On mismatch in the deep sub-micron era - from physics to circuits
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Automatic Behavioural Model Calibration for Efficient PLL System Verification
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Correlation-preserved non-gaussian statistical timing analysis with quadratic timing model
Proceedings of the 42nd annual Design Automation Conference
A general framework for accurate statistical timing analysis considering correlations
Proceedings of the 42nd annual Design Automation Conference
Proceedings of the 42nd annual Design Automation Conference
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Nonparametric belief propagation
CVPR'03 Proceedings of the 2003 IEEE computer society conference on Computer vision and pattern recognition
A taylor series methodology for analyzing the effects of process variation on circuit operation
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Efficient trimmed-sample Monte Carlo methodology and yield-aware design flow for analog circuits
Proceedings of the 49th Annual Design Automation Conference
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Probabilistic system simulations for analog circuits have traditionally been handled with Monte Carlo analysis. For a manufacturable design, fast and accurate simulations are necessary for time-to-market, design for manufacturability and yield concerns. In this paper, a fast and accurate probabilistic simulation alternative is proposed targeting the simulation of analog systems. The proposed method shows high accuracy for performance estimation combined with a 100- fold reduction in run-time with respect to a 1000-sample Monte Carlo analysis.