Proceedings of the 1st international workshop on Software and performance
Cross-architecture performance predictions for scientific applications using parameterized models
Proceedings of the joint international conference on Measurement and modeling of computer systems
Pin: building customized program analysis tools with dynamic instrumentation
Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation
Scientific Programming - High Performance Computing with the Cell Broadband Engine
Hybrid Techniques for Fast Multicore Simulation
Euro-Par '09 Proceedings of the 15th International Euro-Par Conference on Parallel Processing
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In this paper, we present a predictive Monte Carlo based performance model for in-order microarchitectures that is validated against the Itanium-2 processor. In such architectures, we find that application specific characteristics such as load carried dependence and prefetching significantly impact performance. We parametrize these effects and use the PIN instrumentation tool to obtain them. We use Monte Carlo sampling techniques to model the processor core, memory hierarchy and application characteristics. These techniques are widely used in physical simulations but their application to computer architecture performance modeling is atypical and the application parameterization used in this work is also believed to be novel. Preliminary results indicate that the model predicts CPI with a high degree of accuracy as validated against real measurements. Unlike detailed cycle accurate simulation which is computationally infeasible for evaluating realistic scientific applications, the proposed Monte Carlo model converges to a prediction in a few seconds. The accuracy of the model given its simplicity is surprising.