Lattice basis reduction: improved practical algorithms and solving subset sum problems
Mathematical Programming: Series A and B
On Limits of Wireless Communications in a Fading Environment when UsingMultiple Antennas
Wireless Personal Communications: An International Journal
On maximum-likelihood detection and the search for the closest lattice point
IEEE Transactions on Information Theory
Reduced-complexity mimo detector with close-to ml error rate performance
Proceedings of the 17th ACM Great Lakes symposium on VLSI
An architecture for energy efficient sphere decoding
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
High-throughput low-complexity MIMO detector based on K-best algorithm
Proceedings of the 19th ACM Great Lakes symposium on VLSI
A VLSI 8 × 8 MIMO Near-ML Detector with Preprocessing
Journal of Signal Processing Systems
Probabilistic spherical detection and VLSI implementation for multiple-antenna systems
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Algorithm and hardware complexity reduction techniques for k-best sphere decoders
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Iterative MIMO sphere decoding throughput guarantees under realistic channel conditions
IEEE Communications Letters
Soft-input soft-output single tree-search sphere decoding
IEEE Transactions on Information Theory
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We describe the VLSI implementation of MIMO detectors that exhibit close-to optimum error-rate performance, but still achieve high throughput at low silicon area. In particular, algorithms and VLSI architectures for sphere decoding (SD) and K-best detection are considered, and the corresponding trade-offs between uncoded error-rate performance, silicon area, and throughput are explored. We show that SD with a per-block run-time constraint is best suited for practical implementations.