Empirical model-building and response surface
Empirical model-building and response surface
Statistical Modeling for Computer-Aided Design of MOS VLSI Circuits
Statistical Modeling for Computer-Aided Design of MOS VLSI Circuits
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Integrating analog, mixed signal and RF circuits with digital in a System-on-Chip (SoC) design solution is a major trend nowadays and finds many applications in areas like wireless and wireline communications and multimedia applications.This chapter presents statistical design techniques leading to optimization and yield enhancement of integrated CMOS analog and mixed signal solutions. In a SoC design, minimizing yield loss that often results from incorporating analog or RF parts in a large SoC digital design is becoming increasingly important to maintain a cost effective total solution. This is particularly true in today's deep sub-micron technologies where random process variations, supply noise and ground bounce become increasingly critical. Robust design techniques at both the schematic and physical layout levels will be discussed and demonstrated with design examples of low voltage CMOS analog integrated circuits.