VHDL for Designers
On Accommodating Particular Analog System Models with VHDL
BMAS '00 Proceedings of the 2000 IEEE/ACM international workshop on Behavioral modeling and simulation
Efficiency model of boost dc–dc PWM converters: Research Articles
International Journal of Circuit Theory and Applications
On the nature and inadequacies of transport timing delay constructs in VHDL descriptions
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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A methodology to simulate analog blocks by using VHDL is presented. The proposed approach, which is based on a structural description of previous blocks, allows to simulate complex digital circuits which includes some analog parts (e.g., analog filters, voltage regulator, A/D converter, D/A converter etc.) by adopting an event-driven standard simulator (such as VHDL's simulator). Thus avoiding to use transistor-level simulators which dramatically increase the verification time. The application of the proposed methodology is shown developing the equivalent models of a biquad filter and a DC-DC boost converter. In particular, starting from the description of the fundamental building blocks such as voltage dividers, operational amplifiers, comparators, Miller's integrators and function's generators, the more complex Tow-Thomas biquad filter and DC-DC step-up voltage converter were implemented and simulated. The accuracy obtained is suitable for a preliminary design and validation of the whole systems.