A memory subsystem with comparator arrays for main memory database operations

Authors:
Jun Miyazaki
Affiliations:
Nara Institute of Science and Technology, Keihanna Science City, Nara, Japan
Venue:
Proceedings of the 2006 ACM symposium on Applied computing
Year:
2006

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Abstract

We propose hardware supported intelligent memory access schemes for high performance database operations. A comparator array is installed in a memory module to help database operations, which allows simple predicate matching to be processed in the memory to reduce traffic between the CPU and the main memory. In this paper, we evaluate the query processing performance using introduced memory access schemes and show that hardware support memory accesses improve the performance of the main memory database operations.