Analog VLSI and neural systems
Analog VLSI and neural systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on the 1995 IEEE ASIC conference
Analog VLSI Integration of Massive Parallel Processing Systems
Analog VLSI Integration of Massive Parallel Processing Systems
A vlsi computational sensor for the detection of image features
A vlsi computational sensor for the detection of image features
Analysis and optimization of the asynchronous modulated light detection pixel
Analog Integrated Circuits and Signal Processing
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A compact CMOS vision sensor for the detection of higher level image features, such as corners, junctions (T-, X-, Y-type) and linestops, is presented. The on-chip detection of these features significantly reduces the data amount and hence facilitates the subsequent processing of pattern recognition. The sensor performs a series of template matching operations in an analog/digital mixed mode for various kinds of image filtering operations including thinning, orientation decomposition, error correction, set operations, and others. The analog operations are done in the current domain. A design procedure, based on the formulation of the transistor mismatch, is applied to fulfill both accuracy and speed requirements. The architecture resembles a CNN-UM that can be programmed by a 30-bit word. The results of an experimental 16 × 16 pixel chip demonstrate that the sensor is able to detect features at high speed due to the pixel-parallel operation. Over 270 individual processing operations are performed in about 54 µsec.