4.25 Gb/s laser driver: design challenges and EDA tool limitations

  • Authors:
  • Benjamin Sheahan;John W. Fattaruso;Jennifer Wong;Karlheinz Muth;Boris Murmann

  • Affiliations:
  • Stanford University/TI;Texas Instruments;Texas Instruments;Texas Instruments;Stanford University

  • Venue:
  • Proceedings of the 43rd annual Design Automation Conference
  • Year:
  • 2006

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Abstract

This paper describes the design methodology, simulation, and tools used to design a 4.25 Gb/s high output swing laser driver (LD) and the electrical to optical interface from the LD to the laser diode. The quality of the optical output of a fiber optic communication channel is mainly determined by the LD and the electrical interface from the LD to the laser diode. Of particular importance in the interface is how well the LD overcomes the impact of the parasitic, resistive, capacitive, and inductive elements associated with the bondpad, bondwires, package, PCB transmission lines, passive components, and laser diode and its bondwires. The EDA tools used to model the electrical parasitics focus on RF and microwave applications and provide high frequency S-parameter models. This environment requires a stable time domain model of the electrical to optical interface. The presented LD integrated circuit operates from 155 Mb/s to 4.25 Gb/s with rise and fall times of 70 ps or less and a wide output voltage range, and a modulation current range of 5 mA to 85 mA.