Design space exploration for 3D architectures

  • Authors:
  • Yuan Xie;Gabriel H. Loh;Bryan Black;Kerry Bernstein

  • Affiliations:
  • Pennsylvania State University, University Park, PA;Georgia Institute of Technology, Atlanta, GA;Intel Corporation;IBM Corporation

  • Venue:
  • ACM Journal on Emerging Technologies in Computing Systems (JETC)
  • Year:
  • 2006

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Abstract

As technology scales, interconnects have become a major performance bottleneck and a major source of power consumption for microprocessors. Increasing interconnect costs make it necessary to consider alternate ways of building modern microprocessors. One promising option is 3D architectures where a stack of multiple device layers with direct vertical tunneling through them are put together on the same chip. As fabrication of 3D integrated circuits has become viable, developing CAD tools and architectural techniques is imperative to explore the design space to 3D microarchitectures. In this article, we give a brief introduction to 3D integration technology, discuss the EDA design tools that can enable the adoption of 3D ICs, and present the implementation of various microprocessor components using 3D technology. An industrial case study is presented as an initial attempt to design 3D microarchitectures.