Benchmarking parallel compilers: a UPC case study

  • Authors:
  • Tarek A. El-Ghazawi;François Cantonnet;Yiyi Yao;Smita Annareddy;Ahmed S. Mohamed

  • Affiliations:
  • Department of Electrical and Computer Engineering, The George Washington University, Washington, DC;Department of Electrical and Computer Engineering, The George Washington University, Washington, DC;Department of Electrical and Computer Engineering, The George Washington University, Washington, DC;Department of Electrical and Computer Engineering, The George Washington University, Washington, DC;Department of Electrical and Computer Engineering, The George Washington University, Washington, DC

  • Venue:
  • Future Generation Computer Systems - Systems performance analysis and evaluation
  • Year:
  • 2006

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Abstract

Unified Parallel C (UPC) is an explicit parallel extension to ISO C which follows the Partitioned Global Address Space (PGAS) programming model. UPC, therefore, combines the ability to express parallelism while exploiting locality. To do so, compilers must embody effective UPC-specific optimizations. In this paper we present a strategy for evaluating the performance of PGAS compilers. It is based on emulating possible optimizations and comparing the performance to the raw compiler performance. It will be shown that this technique uncovers missed optimization opportunities. The results also demonstrate that, with such automatic optimizations, the UPC performance will be compared favorably with other paradigms.