Modeling and design exploration of FBDRAM as on-chip memory
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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Recently the semiconductor industry tends to develop a smaller volume device and system with lower power consumption, lower leakage current, and high speed performance. SOI technology has many unique characteristics, which is one of the most promising methods to the direction. As the semiconductor memory is concerned, the 1T-DRAM cell realized by the concept of floating body effect in a PD-SOI nMOSFET can allow the DRAM cell to be scaled down in depth with less area occupied. In this paper, we will propose a new structure of 1T-DRAM cell, which has bottom buried oxide with the sidewall block oxide around its body, which can suppress the leakage current between the S/D and the body of the cell. In addition it can also improve the programming window of the 1T-DRAM cell more than 39% by utilizing its own structural characteristic.