Improved FFSBM algorithm and its VLSI architecture for AVS video standard

Authors:
Li Zhang;Don Xie;Di Wu
Affiliations:
Institute of Computing Technology, Chinese Academy of Sciences, Beijing, P.R. China and Graduate University of Chinese Academy of Sciences, Beijing, P.R. China;Grandview Semiconductor (Beijing) Corporation, Beijing, P.R. China;Institute of Computing Technology, Chinese Academy of Sciences, Beijing, P.R. China
Venue:
Journal of Computer Science and Technology - Special section on China AVS standard
Year:
2006

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Abstract

The Video part of AVS (Audio Video Coding Standard) has been finalized recently. It has adopted variable block size motion compensation to improve its coding efficiency. This has brought heavy computation burden when it is applied to compress the HDTV (high definition television) content. Based on the original FFSBM (fast full search blocking matching), this paper proposes an improved FFSBM algorithm to adaptively reduce the complexity of motion estimation according to the actual motion intensity. The main idea of the proposed algorithm is to use the statistical distribution of MVD (motion vector difference). A VLSI (very large scale integration) architecture is also proposed to implement the improved motion estimation algorithm. Experimental results show that this algorithm-hardware co-design gives better tradeoff of gate-count and throughput than the existing ones and is a proper solution for the variable block size motion estimation in AVS.