JIT compiler optimizations for stack-based processors in embedded platforms

  • Authors:

  • Giuseppe Di Giore;Antonella Di Stefano;Giovanni Morana;Corrado Santoro

  • Affiliations:

  • ST Microelectronics;Universitá di Catania, Catania, Italy;Universitá di Catania, Catania, Italy;Universitá di Catania, Catania, Italy

  • Venue:
  • JTRES '06 Proceedings of the 4th international workshop on Java technologies for real-time and embedded systems
  • Year:
  • 2006

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Abstract

This paper describes the optimizations introduced in porting the CDCHI virtual machine to an ST20-based platform for set-top-boxes. ST20 is a VL-RISC processor by STMicroelectronics featured by a stack-based architecture; this characteristic suggests an easy porting of a Java virtual machine and the associated JIT compiler. However, since the stack of ST20 is very limited (it has only three locations), proper techniques are needed in order to avoid frequent (and heavy) "spill" operations, i.e. saving the content of one or more stack's element---because they are still required by future operations---to make space for data needed by the next instruction to be executed. To face such an issue, two kind of optimizations are introduced, one at compile time and another at run time: both aim at organizing resources, on the ST20 stack, in order to reduce the number of spill operations required. These optimizations not only permit to save memory space---as the resulting code is smaller---but also improve JIT compiler and Java program execution performances.