A generative approach to Universal Cross Assembler design
ACM SIGPLAN Notices
Engineering a simple, efficient code-generator generator
ACM Letters on Programming Languages and Systems (LOPLAS)
The SPARC architecture manual (version 9)
The SPARC architecture manual (version 9)
The PowerPC architecture: a specification for a new family of RISC processors
The PowerPC architecture: a specification for a new family of RISC processors
Automatic checking of instruction specifications
ICSE '97 Proceedings of the 19th international conference on Software engineering
Specifying representations of machine instructions
ACM Transactions on Programming Languages and Systems (TOPLAS)
The Jalapeño dynamic optimizing compiler for Java
JAVA '99 Proceedings of the ACM 1999 conference on Java Grande
Automatic generation of assemblers.
Automatic generation of assemblers.
Java(TM) Language Specification, The (3rd Edition) (Java (Addison-Wesley))
Java(TM) Language Specification, The (3rd Edition) (Java (Addison-Wesley))
Constructing a metacircular Virtual machine in an exploratory programming environment
OOPSLA '05 Companion to the 20th annual ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications
Joeq: a virtual machine and compiler infrastructure
Science of Computer Programming - Special issue on advances in interpreters, virtual machines and emulators (IVME'03)
The virtual processor: fast, architecture-neutral dynamic code generation
VM'04 Proceedings of the 3rd conference on Virtual Machine Research And Technology Symposium - Volume 3
The New Jersey machine-code toolkit
TCON'95 Proceedings of the USENIX 1995 Technical Conference Proceedings
Encoding the Java Virtual Machine's Instruction Set
Electronic Notes in Theoretical Computer Science (ENTCS)
Hi-index | 0.00 |
The Java™ programming language is primarily used for platform-independent programming. Yet it also offers many productivity, maintainability and performance benefits for platform-specific functions, such as the generation of machine code.We have created reliable assemblers for SPARC™, AMD64, IA32 and PowerPC which support all user mode and privileged instructions and with 64-bit mode support for all but the latter. These assemblers are generated as Java source code by our extensible assembler framework, which itself is written in the Java language. The assembler generator also produces javadoc comments that precisely specify the legal values for each operand.Our design is based on the Klein Assembler System written in Self. Assemblers are generated from a specification, as are table-driven disassemblers and unit tests. The specifications that drive the generators are expressed as Java language objects. Thus no extra parsers are needed and developers do not need to learn any new syntax to extend the framework for additional ISAs.Every generated assembler is tested against a preexisting assembler by comparing the output of both. Each instruction's test cases are derived from the cross product of its potential operand values. The majority of tests are positive (i.e., result in a legal instruction encoding). The framework also generates negative tests, which are expected to cause an error detection by an assembler. As with the Klein Assembler System, we have found bugs in the external assemblers as well as in ISA reference manuals.Our framework generates tens of millions of tests. For symbolic operands, our tests include all applicable predefined constants. For integral operands, the important boundary values, such as the respective minimum, maximum, 0, 1 and -1, are tested. Full testing can take hours to run but gives us a high degree of confidence regarding correctness.