8-bit partial sums of 16 luminance values for fast block motion estimation

Authors:
C. J. Duanmu;M. O. Ahmad;M. N. S. Swamy
Affiliations:
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada;Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada;Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
Venue:
ICME '03 Proceedings of the 2003 International Conference on Multimedia and Expo - Volume 2
Year:
2003

Citing 3
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Survey on Block Matching Motion Estimation Algorithms and Architectures with New Results

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Abstract

Fast block motion estimation algorithms are needed for real-time implementations of video coding standards due to the high computational complexity of the full-search algorithm for block motion estimation. In this paper, an algorithm using 8-bit partial sums of 16 luminance values for a fast block motion estimation is proposed. The technique of using the partial sums is employed to reduce the computational complexity of not only the full-search algorithm but also some of the fast block motion estimation algorithms while maintaining their accuracy. Furthermore, it is shown that the byte-type data-parallelism on an SIMD architecture can be utilized to access and process these partial sums concurrently to accelerate the process of motion estimation. Simulation results are presented to demonstrate that the use of the partial sums can accelerate the execution of the full-search, three-step search, and four-step search algorithms on an SIMD architecture significantly.