The ESTEREL synchronous programming language: design, semantics, implementation
Science of Computer Programming
Automata For Modeling Real-Time Systems
ICALP '90 Proceedings of the 17th International Colloquium on Automata, Languages and Programming
Embedded Control: From Asynchrony to Synchrony and Back
EMSOFT '01 Proceedings of the First International Workshop on Embedded Software
A Comparison of Statecharts Variants
ProCoS Proceedings of the Third International Symposium Organized Jointly with the Working Group Provably Correct Systems on Formal Techniques in Real-Time and Fault-Tolerant Systems
From simulink to SCADE/lustre to TTA: a layered approach for distributed embedded applications
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
Defining and translating a "safe" subset of simulink/stateflow into lustre
Proceedings of the 4th ACM international conference on Embedded software
Translating discrete-time simulink to lustre
ACM Transactions on Embedded Computing Systems (TECS)
Argos: an automaton-based synchronous language
Computer Languages
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We describe a simple scheme for mapping synchronous language models, in the form of Boolean Mealy Machines, into timed automata. The mapping captures certain idealized implementation details that are ignored, or assumed away, by the synchronous paradigm. In this regard, the scheme may be compared with other approaches such as the AASAP semantics. However, our model addresses input latching and reaction triggering differently. Additionally, the focus is not on model-checking but rather on creating a semantic model for simulating synchronous controllers within Simulink.The model considers both sample-driven and event-driven execution paradigms, and clarifies their similarities and differences. It provides a means of analyzing the timing behavior of small-scale embedded controllers.The integration of the timed automata models into Simulink is described and related work is discussed.