Data structures and network algorithms
Data structures and network algorithms
Analysis and simulation of a fair queueing algorithm
SIGCOMM '89 Symposium proceedings on Communications architectures & protocols
High-speed switch scheduling for local-area networks
ACM Transactions on Computer Systems (TOCS)
Efficient fair queueing using deficit round-robin
IEEE/ACM Transactions on Networking (TON)
The iSLIP scheduling algorithm for input-queued switches
IEEE/ACM Transactions on Networking (TON)
Digital Design
Proceedings of the 2002 conference on Applications, technologies, architectures, and protocols for computer communications
Stratified round Robin: a low complexity packet scheduler with bandwidth fairness and bounded delay
Proceedings of the 2003 conference on Applications, technologies, architectures, and protocols for computer communications
Pipelined two step iterative matching algorithms for CIOQ crossbar switches
Proceedings of the 2005 ACM symposium on Architecture for networking and communications systems
Saturn: a terabit packet switch using dual round robin
IEEE Communications Magazine
Matching output queueing with a combined input/output-queued switch
IEEE Journal on Selected Areas in Communications
Output-queued switch emulation by fabrics with limited memory
IEEE Journal on Selected Areas in Communications
On guaranteed smooth switching for buffered crossbar switches
IEEE/ACM Transactions on Networking (TON)
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Buffered crossbar switches are a special type of crossbar switches. In such a switch, besides normal input queues and output queues, a small buffer is associated with each crosspoint. Due to the introduction of crosspoint buffers, output and input contention is eliminated, and the scheduling process for buffered crossbar switches is greatly simplified. Moreover, crosspoint buffers enable the switch to work in an asynchronous mode and easily schedule and transmit variable length packets. Compared with fixed length packet scheduling or cell scheduling, variable length packet scheduling, or packet scheduling for short, has some unique advantages: higher throughput, shorter packet latency and lower hardware cost. In this paper, we present a fast and practical scheduling scheme for buffered crossbar switches called Localized Asynchronous Packet Scheduling (LAPS). With LAPS, an input port or output port makes scheduling decisions solely based on the state information of its local crosspoint buffers, i.e., the crosspoint buffers where the input port sends packets to or the output port retrieves packets from. The localization property makes LAPS suitable for a distributed implementation and thus highly scalable. Since no comparison operation is required in LAPS, scheduling arbiters can be efficiently implemented using priority encoders, which can make arbitration decisions quickly in hardware. Another advantage of LAPS is that each crosspoint needs only L (the maximum packet length) buffer space, which minimizes the hardware cost of the switches. We also theoretically analyze the performance of LAPS, and in particular we prove that LAPS achieves 100% throughput for any admissible traffic with speedup of two. Finally, simulations are conducted to verify the analytical results and measure the performance of LAPS.